Field of the Disclosure
The present application relates to a gate driver, a display device with the same and a driving method thereof.
Description of the Related Art
Recently, a variety of flat panel display devices with reduced weight and volume to address the disadvantages of cathode ray tube (CRT) are being developed. The flat panel display devices include liquid crystal display (LCD) devices, field emission display (FED) devices, plasma display panels (PDPs), electroluminescence devices and so on.
FIG. 1 is a block diagram showing a display device of the related art. FIG. 2 is a detailed block diagram showing the configuration of a gate driver IC (integrated circuit) chip disposed in the gate driver of FIG. 1.
Referring to FIGS. 1 and 2, the related art display device 10 includes a display panel defined into a display area 20 displaying images and a non-display area 30 surrounding edges of the display area 20. Also, the related art display device 10 includes a gate driver 12 and a data driver 13, which are disposed in the non-display area 30 of the display panel, and a printed circuit board (PCB) 50 configured to supply a plurality of control signals to the gate driver 12 and the data driver 13.
The printed circuit board 50 is loaded with a timing controller (not shown). The timing controller generates signals which will be applied to the gate driver 12 and the data driver 13.
Recently, the display device 10 becomes larger and higher in size and definition. In accordance therewith, a chip-on-glass (COG) display device has been proposed which allows the gate driver 12 and the data driver 13 to be mounted on the display panel.
Also, a line-on-glass (LOG) display device has been proposed which includes a plurality of signal lines formed on the non-display area 30 of the display panel. In the LOG display device, a flexible printed circuit board loaded with gate driver IC chips is directly connected to the plurality of signal lines on the non-display area of the display panel.
All the COG and LOG display devices have a common feature of forming the plurality of signal lines in the non-display area of the display panel.
As such, a plurality of signal lines 40 is formed in the non-display area 30 of the display panel. The plurality of signal lines 40 is used to transfer signals to the gate driver 12 and the data driver 13.
The gate driver 12 includes a plurality of gate driver IC chips. The data driver 13 includes a plurality of data driver IC chips.
FIG. 2 shows a configuration of a gate driver IC chip 60 which is disposed in the gate driver 12 of FIG. 1. The gate driver IC chip 60 includes a shift register 61 configured to include a plurality of stages (or flip-flops F/Fs) and an output portion 62 configured to transfer gate signals output from the shift register 61 to gate lines G_odd and G_even which are arranged on the display panel. The ‘G_odd’ indicates an odd gate signal applied to odd-numbered gate line of the gate lines arranged on the display panel. The ‘G_even’ indicates an even gate signal applied to even-numbered gate lines of the gate lines on the display panel.
As shown in the drawings, the gate driver IC chip 60 receives gate control signals from the timing controller disposed on the printed circuit board 50. Also, the gate driver IC 60 chip sequentially generates the gate signals using the gate control signals. For example, the gate control signals can include shift clock signals GSC1 and GSC2, gate start pulse signals GSPA and GSPB, gate output enable signals GOE1 and GOE2 and so on.
Such a COG or an LOG display device of the related art must force a large number of signal lines 40 for transferring the gate control signals to the gate driver 12 be formed in the non-display area 30 of the display panel. Due to this, it is difficult to reduce a bezel area of the display device 10. Moreover, the large number of signal lines 40 formed on the display panel must increase connection pins of the printed circuit board 50 which are connected to the signals line 40.